2025 Showcase

2025 AI Infra Summit


Welcome to our AI Infra Summit 2025 Video Showcase! The conference is organized by Kisaco.
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Analysis by AvidThink

What we learned at AI Infra Summit 2025

Fourteen interviews in Santa Clara converge on one metric: how much of your GPU spend actually computes.

  1. GPU utilization is the industry's scoreboard

    Cornelis' CEO says 30% of GPU time is lost waiting on communications; NeuReality claims its 1.6T NIC lifts GPU active time from 16% to nearly 80%; Aviz targets allocation and monitoring across multi-tenant GPU estates. Every networking pitch now leads with reclaimed GPU hours.

  2. Ethernet extends its claim over AI fabrics

    Broadcom argues Ethernet's clean interfaces and reliability make it optimal across every AI scaling domain, d-Matrix scales accelerator nodes over Ethernet switches, and Hedgehog runs open-source SONiC networking on whitebox switches — supporting Nvidia, AMD, and AWS accelerators alike.

  3. Optics move toward the package

    Ayar Labs claims 10–20x better performance per watt than copper IO for multi-rack GPU inference, Lightmatter's Passage brings silicon photonics into the chip package, and Xscape Photonics generates multiple wavelengths on silicon to close AI bandwidth gaps. Copper's reach problem is becoming photonics' market.

  4. Scale-up standards go plural

    The UALink Consortium counts 110+ members implementing its specs, with AWS, Google, Meta, and Intel cited as deployers — an open, Ethernet-based alternative to proprietary scale-up fabrics. DriveNets frames the design space cleanly: scale up, scale out, and scale across data centers as one system.

  5. Silicon diversity beyond the GPU

    Marvell tripled die-to-die bandwidth density while cutting power 40–70% and pairs custom HBM with its Striker aggregation device; SiFive pushes vector-length-agnostic RISC-V from data center to edge with claimed 322x generational gains; d-Matrix pairs its Corsair compute with the Jetream IO accelerator. The accelerator monoculture is over.

More about this report →

Highlights from industry thought leaders

Video interviews

Aviz Networks

Aviz on Scaling AI Workloads with Open Networks

  • Aviz Networks targets GPU resource allocation and monitoring across multi-tenant AI environments.
  • Partners with Nvidia on the Spectrum X platform for deployment and analytics.
  • Supports both Nvidia and AMD GPU infrastructures on SONiC-based networks.
Abstract
Vishal Shukla, Founder and CEO of Aviz Networks, leads the company's development of network management solutions that enhance GPU resource allocation and monitoring across multi-tenant environments. Through their collaboration with Nvidia on the Spectrum X platform, Aviz Networks delivers comprehensive system deployment capabilities and analytics for both Nvidia and AMD GPU infrastructures in SONiC-based networks.
Ayar Labs

Ayar Labs CTO on Optical I/O for AI Networks

  • Ayar Labs' optical IO connects GPUs across multi-rack clusters for AI inference.
  • Claims 10-20x better performance per watt versus traditional copper IO.
  • Enables direct extended memory connections beyond the rack.
Abstract
Vladimir Stojanovic, CTO & Co-Founder of Ayar Labs, outlines the company's optical IO technology that addresses GPU scaling challenges in AI inference workloads by enabling connectivity across multi-rack GPU clusters. The solution achieves 10-20x better performance per watt while supporting direct extended memory connections, marking a significant advance over traditional copper IO approaches.
Broadcom

Broadcom’s Ram Velaga on Scaling AI Networks

  • Broadcom argues networking must span multiple scaling domains to support AI infrastructure.
  • Positions Ethernet as the optimal networking solution for AI workloads.
  • Cites Ethernet's clean interface, proven reliability, and consistent bandwidth gains.
Abstract
Ram Velaga, GM and SVP of Core Switching Group at Broadcom, discusses how networking must evolve to support expanding AI infrastructure and machine learning systems across multiple scaling domains in data centers. He explains why Ethernet technology stands out as the optimal networking solution for AI infrastructure, highlighting its clean interface, proven reliability, and consistent bandwidth improvements that align with industry needs.
Cornelis Networks

Cornelis CEO on Scalability for AI Networking

  • Cornelis CEO says 30% of GPU time is lost waiting on communications.
  • Cornelis networking scales up to 500,000 endpoints without performance limits.
Abstract
At AI Infra 2025, Lisa Spelman, CEO of Cornelis Networks, shared insights on GPU utilization challenges, noting that 30% of GPU time is lost waiting for communications. Cornelis Networks addresses these inefficiencies through networking solutions that enable scaling up to 500,000 endpoints without hitting performance limitations.
d-Matrix

d-Matrix on AI Efficiency and Scale

  • d-Matrix's Jetream IO accelerator pairs with its Corsair compute accelerator for multi-node scaling.
  • PCI cards support up to eight Corsair accelerators per node.
  • Cross-node scaling is achieved through an Ethernet switch.
Abstract
Sid Sheth, CEO of d-Matrix, introduces their Jetream IO accelerator product that works alongside their Corsair compute accelerator to enable multi-node AI workload scaling. The solution uses PCI cards supporting up to eight Corsair accelerators per node, with the Jetream IO accelerator enabling cross-node scaling through an Ethernet switch.
DriveNets

DriveNets on Scaling AI Networks

  • DriveNets frames AI scaling in three modes: scale up, scale out, and scale across.
  • Modern networks can support up to 576 GPUs in a single cluster.
  • Scale across unifies distributed GPU resources across multiple data centers as one system.
Abstract
Dudy Cohen, VP, Product Marketing at DriveNets, outlines three essential approaches to AI infrastructure scaling: scale up, scale out, and scale across, demonstrating how modern networks can support up to 576 GPUs in single clusters. His analysis shows how scale out networking enables unlimited GPU scalability through fabric scheduled architectures, while scale across solutions allow organizations to manage distributed GPU resources across multiple data centers as one unified system.
Hedgehog

Hedgehog on Open Networking for AI Data Centers

  • Hedgehog's open-source networking software runs on whitebox switches at significantly lower cost.
  • Automates network operations for AI data centers.
  • Supports AI accelerators beyond Nvidia, including AWS and AMD.
Abstract
Marc Austin, CEO of Hedgehog, showcases the company's open-source AI networking software that delivers superior performance on whitebox switches compared to traditional solutions at significantly lower costs. The solution enables automated network operations while supporting diverse AI accelerators beyond Nvidia, including offerings from AWS and AMD.
Lightmatter

Lightmatter on Breaking the AI Interconnect Bottleneck

  • Lightmatter's Passage photonic technology boosts chip connectivity and bandwidth for AI.
  • Uses silicon photonics for high-speed data transmission.
  • L series is designed to integrate with existing data center infrastructure.
Abstract
Steve Klinger, VP Product at Lightmatter, showcases their Passage photonic technology that tackles AI computing bottlenecks by enhancing chip connectivity and bandwidth capabilities. The solution enables high-speed data transmission through silicon photonics and provides seamless integration with existing data center infrastructure through their L series offering.
Marvell

Marvell on Custom HBM & SRAM for AI Chips

  • Marvell's memory strategy centers on embedded SRAM IP, custom HBM, and the Striker aggregation device.
  • Aims to improve bandwidth and reduce latency across multiple memory types.
Abstract
Mark Kuemerle, VP of Technology and CTO of ASIC Business Unit at Marvell, presented key memory optimization strategies at the AI Infrastructure Summit, focusing on embedded SRAM IP, custom HBM, and the Striker memory aggregation device. These innovations from Marvell enhance data center performance by improving bandwidth and reducing latency across multiple memory types.
Marvell

Building Blocks for AI Processing

  • Marvell's new die-to-die interface triples bandwidth density.
  • Cuts power consumption by 40-70% versus prior approaches.
  • IP block improves interconnect between dies and custom HBM.
Abstract
Mark Kuemerle, VP of Technology and CTO of ASIC Business Unit at Marvell, presented the company's new die-to-die interface technology at the AI Infrastructure Summit, highlighting its ability to triple bandwidth density while reducing power consumption by 40-70%. The innovative IP block enhances interconnect capabilities between dies and custom HBM, marking a major step forward in data center AI system development.
NeuReality

NeuReality’s 1.6T AI NIC — Moshe Tanach

  • NeuReality's 1.6T NIC lifts GPU active time from 16% to nearly 80%.
  • Slated for release in late 2026 with in-network compute and Ultra Ethernet support.
  • Positioned as a low-latency alternative to InfiniBand.
Abstract
Moshe Tanach, Co-Founder & CEO of NeuReality, unveiled their upcoming 1.6 terabyte NIC product that enhances GPU efficiency in AI workloads by improving active time from 16% to nearly 80%. The new NIC, set for release in late 2026, features in-network compute capabilities and Ultra Ethernet support, providing an alternative to InfiniBand while maintaining low latency performance.
SiFive

RISC-V for AI

  • SiFive touts RISC-V vector length agnostic instructions for consistent execution from data center to edge.
  • X100 series adds scalar co-processing, hardware exponential instruction, and memory improvements.
  • Claims up to 322x performance gains over previous generations.
Abstract
John Simpson, Senior Principal Architect at SiFive, showcases RISC-5's vector length agnostic instructions that enable consistent software execution across data centers and edge devices at the AI Infra Summit. He introduces SiFive's X100 series featuring scalar co-processing, hardware pipeline exponential instruction, and memory system improvements that deliver up to 322x performance gains over previous generations.
UALink Consortium
  • UALink Consortium has over 110 members implementing its specs in switches and accelerators.
  • The open standard builds on existing Ethernet infrastructure.
  • AWS, Google, Meta, and Intel are cited as deploying UALink in data centers.
Abstract
Kurtis Bowman, Chairman of UALink Consortium, outlines how their open standard technology meets scaling requirements with over 110 members implementing specifications in switches and accelerators. The technology builds on existing Ethernet infrastructure while enabling companies to maintain their focus, with major tech firms like AWS, Google, Meta, and Intel actively deploying UALink solutions in their data centers.
Xscape Photonics

Xscape Photonics on Scaling AI with Light

  • Xscape Photonics builds silicon photonics lasers to close AI bandwidth gaps.
  • Adapts wavelength division multiplexing to generate multiple wavelengths on silicon chips.
  • Initial products target AI fabric and accelerator vendors.
Abstract
Vivek Raghunathan, Co-Founder and CEO of Xscape Photonics, is developing silicon photonics-based laser solutions to address bandwidth constraints in AI computing systems, where GPU-to-memory bandwidth significantly outpaces package-to-package communication. The company's technology adapts wavelength division multiplexing to create scalable lasers generating multiple wavelengths on silicon chips, with initial products targeting AI fabric and accelerator vendors.
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