2025 AI Infra Summit
Welcome to our AI Infra Summit 2025 Video Showcase! The conference is organized by Kisaco.
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Aviz on Scaling AI Workloads with Open Networks
Ayar Labs CTO on Optical I/O for AI Networks
Broadcom’s Ram Velaga on Scaling AI Networks
Cornelis CEO on Scalability for AI Networking
d-Matrix on AI Efficiency and Scale
DriveNets on Scaling AI Networks
Hedgehog on Open Networking for AI Data Centers
Lightmatter on Breaking the AI Interconnect Bottleneck
Marvell on Custom HBM & SRAM for AI Chips
Building Blocks for AI Processing
NeuReality’s 1.6T AI NIC — Moshe Tanach
RISC-V for AI
UALink - Accelerating AI Interconnect Innovation
Xscape Photonics on Scaling AI with Light

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What we learned at AI Infra Summit 2025
Fourteen interviews in Santa Clara converge on one metric: how much of your GPU spend actually computes.
GPU utilization is the industry's scoreboard
Cornelis' CEO says 30% of GPU time is lost waiting on communications; NeuReality claims its 1.6T NIC lifts GPU active time from 16% to nearly 80%; Aviz targets allocation and monitoring across multi-tenant GPU estates. Every networking pitch now leads with reclaimed GPU hours.
Ethernet extends its claim over AI fabrics
Broadcom argues Ethernet's clean interfaces and reliability make it optimal across every AI scaling domain, d-Matrix scales accelerator nodes over Ethernet switches, and Hedgehog runs open-source SONiC networking on whitebox switches — supporting Nvidia, AMD, and AWS accelerators alike.
Optics move toward the package
Ayar Labs claims 10–20x better performance per watt than copper IO for multi-rack GPU inference, Lightmatter's Passage brings silicon photonics into the chip package, and Xscape Photonics generates multiple wavelengths on silicon to close AI bandwidth gaps. Copper's reach problem is becoming photonics' market.
Scale-up standards go plural
The UALink Consortium counts 110+ members implementing its specs, with AWS, Google, Meta, and Intel cited as deployers — an open, Ethernet-based alternative to proprietary scale-up fabrics. DriveNets frames the design space cleanly: scale up, scale out, and scale across data centers as one system.
Silicon diversity beyond the GPU
Marvell tripled die-to-die bandwidth density while cutting power 40–70% and pairs custom HBM with its Striker aggregation device; SiFive pushes vector-length-agnostic RISC-V from data center to edge with claimed 322x generational gains; d-Matrix pairs its Corsair compute with the Jetream IO accelerator. The accelerator monoculture is over.
Highlights from industry thought leaders













Video interviews
Aviz on Scaling AI Workloads with Open Networks
- Aviz Networks targets GPU resource allocation and monitoring across multi-tenant AI environments.
- Partners with Nvidia on the Spectrum X platform for deployment and analytics.
- Supports both Nvidia and AMD GPU infrastructures on SONiC-based networks.
Abstract
Ayar Labs CTO on Optical I/O for AI Networks
- Ayar Labs' optical IO connects GPUs across multi-rack clusters for AI inference.
- Claims 10-20x better performance per watt versus traditional copper IO.
- Enables direct extended memory connections beyond the rack.
Abstract
Broadcom’s Ram Velaga on Scaling AI Networks
- Broadcom argues networking must span multiple scaling domains to support AI infrastructure.
- Positions Ethernet as the optimal networking solution for AI workloads.
- Cites Ethernet's clean interface, proven reliability, and consistent bandwidth gains.
Abstract
Cornelis CEO on Scalability for AI Networking
- Cornelis CEO says 30% of GPU time is lost waiting on communications.
- Cornelis networking scales up to 500,000 endpoints without performance limits.
Abstract
d-Matrix on AI Efficiency and Scale
- d-Matrix's Jetream IO accelerator pairs with its Corsair compute accelerator for multi-node scaling.
- PCI cards support up to eight Corsair accelerators per node.
- Cross-node scaling is achieved through an Ethernet switch.
Abstract
DriveNets on Scaling AI Networks
- DriveNets frames AI scaling in three modes: scale up, scale out, and scale across.
- Modern networks can support up to 576 GPUs in a single cluster.
- Scale across unifies distributed GPU resources across multiple data centers as one system.
Abstract
Hedgehog on Open Networking for AI Data Centers
- Hedgehog's open-source networking software runs on whitebox switches at significantly lower cost.
- Automates network operations for AI data centers.
- Supports AI accelerators beyond Nvidia, including AWS and AMD.
Abstract
Lightmatter on Breaking the AI Interconnect Bottleneck
- Lightmatter's Passage photonic technology boosts chip connectivity and bandwidth for AI.
- Uses silicon photonics for high-speed data transmission.
- L series is designed to integrate with existing data center infrastructure.
Abstract
Marvell on Custom HBM & SRAM for AI Chips
- Marvell's memory strategy centers on embedded SRAM IP, custom HBM, and the Striker aggregation device.
- Aims to improve bandwidth and reduce latency across multiple memory types.
Abstract
Building Blocks for AI Processing
- Marvell's new die-to-die interface triples bandwidth density.
- Cuts power consumption by 40-70% versus prior approaches.
- IP block improves interconnect between dies and custom HBM.
Abstract
NeuReality’s 1.6T AI NIC — Moshe Tanach
- NeuReality's 1.6T NIC lifts GPU active time from 16% to nearly 80%.
- Slated for release in late 2026 with in-network compute and Ultra Ethernet support.
- Positioned as a low-latency alternative to InfiniBand.
Abstract
RISC-V for AI
- SiFive touts RISC-V vector length agnostic instructions for consistent execution from data center to edge.
- X100 series adds scalar co-processing, hardware exponential instruction, and memory improvements.
- Claims up to 322x performance gains over previous generations.
Abstract
UALink - Accelerating AI Interconnect Innovation
- UALink Consortium has over 110 members implementing its specs in switches and accelerators.
- The open standard builds on existing Ethernet infrastructure.
- AWS, Google, Meta, and Intel are cited as deploying UALink in data centers.
Abstract
Xscape Photonics on Scaling AI with Light
- Xscape Photonics builds silicon photonics lasers to close AI bandwidth gaps.
- Adapts wavelength division multiplexing to generate multiple wavelengths on silicon chips.
- Initial products target AI fabric and accelerator vendors.
Abstract
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