Technology Exploration Forum Showcase

Alan Weckel, Founder and Technology Analyst at 650 Group, presents at TEF 2026 on how 400 gig electrical technology enables AI-driven network deployments by unlocking 3.2 terabit speeds through 400 by 8 configurations as Ethernet enters the scale-up space alongside scale-out and scale-across domains. He explains that this evolution will drive the Ethernet switching market beyond $300 billion this decade and exceed one trillion dollars early next decade, requiring an order of magnitude expansion in manufacturing capacity as deployments shift from individual switches to switch racks and from tens of millions to hundreds of millions of ports.

Cathy Liu, SerDes Architect at Broadcom and OIF board member, addresses the challenges of 100-gig signaling, explaining that the combination of modulation, channel reach, and power presents the most significant obstacle, with no single modulation perfectly serving all topologies based on current infrastructure. Liu emphasizes that solving the 400-gig challenge requires a holistic systems approach combining modulation decisions with power and latency considerations, noting that PAM6 works best for passive copper cable backplanes, PAM4 for active cables, and long-reach channels need AEC, ACC, or linear optics, while chip-to-module applications can support both standards depending on vendor resources.

Eric Maniloff, Senior Systems Engineer at Ciena, discusses how coherent optics is finally entering data centers with 1.6 terabit Ethernet, driven by AI workloads that prioritize power, latency, and loss budgets over cost-per-bit. He explains that the industry debate has shifted from whether to adopt coherent optics to which type — high-performance 1600 ZR class DSPs versus custom Ethernet-optimized DSPs designed specifically for data center AI applications.

Earl Parsons, Director of Data Center Architecture Evolution at CommScope, examines the critical challenges of 400G networks in AI deployments, focusing on power consumption, optical loss budgets, and the necessity of low-loss, high-density fiber connectivity with excellent reliability. He emphasizes that co-design across racks, networking, power, and fiber is essential for AI infrastructure, highlighting CommScope's new V-groove connectors and self-cleaning technology as solutions, while expressing confidence that Ethernet will continue as an innovation platform for future AI networks.

David Rodgers, Chair and President of the Ethernet Alliance, reports from the Technology Exploration Forum in Mountain View on the near-complete 1.6 terabit Ethernet specification (802.3dj) expected to be ratified by OFC, the rapidly evolving ecosystem supporting it, and the forum's focus on pathways to 3.2 terabit Ethernet. He highlights the strong participation from hyperscalers, manufacturers, test and measurement companies, and interconnect vendors, noting that the combination of formal presentations and informal discussions creates a highly productive environment for developing new solutions.

John D'Ambrosia, Chair Emeritus of the Ethernet Alliance, discusses critical developments in Ethernet infrastructure for AI applications, covering challenges from 400 Gbit copper implementations to hyperscale data center connectivity, optical solutions including coherent and IM-DD optics, and various packaging approaches like NPO, CPO, and XPO. The Ethernet Alliance is developing a 2027 roadmap focused on Ethernet for AI that will examine emerging technologies including new fibers, connectors, and signaling innovations to advance the platform's evolution.

John Calvin, Senior Strategic Planner at Keysight Technologies, discusses the company's role in developing validation and interoperability testing tools for AI industry Ethernet interconnects, particularly addressing challenges in the transition to 400 Gbps driven by channel and connector limitations. He highlights Keysight's development of vector network analyzers, oscilloscopes, and test tools for the 100-250 gigahertz space, emphasizing that measurement science will be critical over the next ten months for optimizing modulation format decisions as the industry advances toward 400 Gbps and 800 Gbps signaling.

Adrian Motamedi, Sr. Principal Azure Cloud & AI Architect at Microsoft, examines the requirements for making 400G optical networking AI-ready, highlighting challenges such as link flaps, modulation issues, and the need for better form factors with improved serviceability and fiber management. He advocates for vendors to implement stronger screening and quality control processes, expresses preference for NRZ or PAM4 modulation to avoid gearboxing complications, and emphasizes the importance of streamlined modulation schemes across infrastructure to prevent interoperability issues, latency increases, and power impacts.

Bob Wagner, Senior Business Development Manager at Panduit, discusses how AI systems are driving major changes in data center infrastructure, including the shift from air to liquid cooling due to power constraints and the need for significantly more fiber optic infrastructure to support higher data rates and increasingly complex multi-plane architectures. He explains Panduit's three-pronged strategy of delivering foolproof solutions with protective features, future-proof installations that avoid premature replacement, and faster deployment times to help cloud vendors accelerate their time to revenue.

Jose M Castro, Fiber Optical Communication Research Manager at Panduit, discusses how the proliferation of optics in scale-up architectures will enable connectivity for hundreds of thousands of GPUs over the next five years. He explains that as AI models grow requiring low latency and high bandwidth, Ethernet-based optical solutions will be the key enabling technology to expand GPU interconnection from 72 to 144, then to 500, and ultimately to thousands or tens of thousands of GPUs functioning as a single unit.

Kent Lusted, Distinguished Architect at Synopsys and chair of the IEEE 802.3dv 400 Gig per lane signaling task force, updates progress on Ethernet standards development addressing AI network demands for scale-up, scale-out, and front-end connectivity through copper interconnects, electrical backplanes, copper cables, and 500-meter optical reaches. The working group has achieved industry consensus on reusing existing logic architecture, converging toward PAM4 modulation for optical interconnects, and defining specifications for both PAM4 and PAM6 electrical standards to provide flexibility across various media types and interconnect architectures.

Ashika Pandankeril Shaji, Manager System Architect at TE Connectivity, discusses how AI is driving Ethernet evolution in data centers, where increasing demand requires simultaneous solutions for bandwidth, density, modulation, and power, with 448 Gbps now achievable through PAM 4 and PAM 6 modulation depending on reach requirements. She predicts data centers will look dramatically different in five years with new architectures and cooling solutions, emphasizing the critical role of industry collaboration through organizations like the Ethernet Alliance in addressing these complex challenges.

Rangchen Yu, Vice President of Marketing at Terahop, examines four major challenges AI presents to the Ethernet community: accelerated generational changes (now 1-2 years versus traditional 4-5 year cycles), immediate demand for deployment-ready products, massive volume increases requiring hundreds of millions of optical units across multiple generations, and diverse AI infrastructure requirements spanning scale-up, scale-out, scale-across, and scale-in networking. Yu expresses confidence that the Ethernet community will leverage its decades of experience with open standards in optical networking to successfully address these challenges.

Paul Brooks, Product Line Manager at VIAVI, discusses how AI is accelerating networking infrastructure demands at the Ethernet Alliance TEF 2026 event, with development cycles compressed from seven years to just two years and scale expanding from thousands to millions of connections requiring massive manufacturing capacity. Brooks expresses confidence that the industry ecosystem is well-positioned to meet these challenges and successfully transition to the gigascale data center era despite the compressed timelines and technical hurdles of advancing to 400 gigabit per lane technology.